Mesa 19.3.2 Is Released With SDMA Disabled On Older AMD GPUs
The latest stable version of the Mesa graphics stack has SDMA disabled in the RadeonSI OpenGL backend on AMD GFX8-series graphics cards due to a few reported cases of graphics corruption in OpenGL games on AMD RX 580 graphics cards. The result will be a 0-4% performance-penalty on a older graphics cards ranging from the R9 285 to the RX 580.
A GFX8 series Polaris GPU (RX 570).
We recently wrote that Mesa 20 Will Have SDMA Disabled On AMD RX-Series GPUs. That change is also applied in Mesa 19.3.2.
SDMA is used for paging and other memory management tasks. It is asynchronous, which makes it faster, but it is also not cache coherent which means that it has a synchronization overhead. That means that some OpenGL games and applications will be faster with SDMA disabled while others get a performance penalty. Various benchmarks indicates that OpenGL games run 0-4% slower with SDMA disabled.
AMD developers have indicated that they will try to fix the underlying cause of the graphics corruption on certain GFX8 series cards and re-enable SDMA in the OpenGL backend. SDMA has been disabled on GFX10-series ("Navi") graphics cards since shortly after those cards were lanuched. Machines with those cards have a tendency to completely lock up when SDMA is enabled.
Other changes in Mesa 19.3.2 include some minor fixes for Vulkan on AMD GPUs (RADV) and some minor fixes for integrated Intel graphics.
Mesa release-manager Dylan Baker had this to say about the release:
"In general this release looks pretty reasonable given the length of time and the number of people celebrating (or not working) over the holidays.
Intel and AMD drivers make up the bulk of the changes, with a bit of nir and glsl, plus a sprinkling of other stuff in there."
The complete changelog for Mesa 19.3.1 is as follows:
- glsl: fix an incorrect max_array_access after optimization of ssbo/ubo
- glsl: fix a binding points assignment for ssbo/ubo arrays
- glsl/nir: do not change an element index to have correct block name
- radv: Limit workgroup size to 1024.
- radv: Expose all sample counts for integer formats as well.
- amd/common: Handle alignment of 96-bit formats.
- nir: Add clone/hash/serialize support for non-uniform tex instructions.
- spirv: Fix glsl type assert in spir2nir.
- radv: Only use the gfx mipmap level offset/pitch for linear textures.
- radv: Emit a BATCH_BREAK when changing pixel shaders or CB_TARGET_MASK.
- intel/fs: Lower 64-bit MOVs after lower_load_payload()
- intel/fs: Fix lowering of dword multiplication by 16-bit constant
- intel/vec4: Fix lowering of multiplication by 16-bit constant
- anv: Ignore some CreateInfo structs when rasterization is disabled
- etnaviv: update resource status after flushing
- dcos: add releanse notes for 19.3.1
- cherry-ignore: update for 19.3.2
- docs: Add release notes for 19.3.2
- util/format: remove left-over util_format_description_table declaration
- amd: fix empty-body issues
- nine: fix empty-body-issues
- mesa: avoid returning a value in a void function
- r600: Fix maximum line width
- anv: Properly advertise sampledImageIntegerSampleCounts
- intel/nir: Add a memory barrier before barrier()
- loader: fix close on uninitialized file descriptor value
- anv: don't close invalid syncfd semaphore
- winsys/radeon: initialize pte_fragment_size
- radeonsi: disable SDMA on gfx8 to fix corruption on RX 580
- radeon/vcn2: enable rate control for hevc encoding
- radeonsi: check ctx->sdma_cs before using it
- radv/gfx10: fix the out-of-bounds check for vertex descriptors
- radv: return the correct pitch for linear mipmaps on GFX10
- aco: Fix uniform i2i64.
- meta: Cleanup function for DrawTex
- main: allow external textures for BindImageTexture
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